A 5721 DIP Buster

Rev 7 Super Buster

Rev 11 Super Buster

The Buster is the bus controller and handles Zorro II and Zorro III (for later versions) I/O operations and bus arbitration.

The Buster - according to Dave Haynie

Though you think it's the same chip, there are actually two Busters: Level I and Level II. The Level I Buster, up to Rev 7, is used in all A3000 family machines, and it does NOT support Zorro III bus masters. Doesn't even try. There came a time in the A3000 development where I had to chose between adding more Zorro III features (I designed the whole bus specification before I did the chip work) and getting Zorro II compatibility up to par. Zorro II was tricky -- in essence, it's a 68000 bus emulator in there, and some of the interactions between 68K procotol and real Zorro II hardware were not things you could have easily predicted at the start of the project. And given that C= management hadn't even asked for expansion bus improvements on the A3000 (all my idea), you can see where Level I came from. The Level II part (about twice as many gates) was out in two revisions; Rev 9, which initially shipped with the A4000, and Rev 11, which is the best you'll ever get. The Rev 9 part has two bugs that can cause problems with Zorro III cards. One can affect some kinds of bus slave cards, it depends on the card design. This is due to a small flaw in a synchronizer stage in the Level II chip (Level II runs a slightly faster bus protocol than Level I, and also supports burst). The other is a flaw in the Zorro III bus arbiter -- there's a small window in which a Zorro III slave cycle just starting can confuse a bus registration command, locking the bus. Rev 11 solves both problems, so you need it for DMA devices. The Rev 9 problems were fairly well qualified, so you have some devices that offered work-arounds. I didn't for the A4091 -- at the time, C= probably wouldn't have let me do the Rev 11 chip if the A4091 could have worked at all in existing A4000s. A3000s use the Level I Buster, never intended to work with something like the A4091. The Rev 11 part works fine in the A3000, and in fact fixed a race condition between Gary and the chip bus that can cause memory failured during Zorro II DMA to Chip RAM. The big problem with Buster testing was the lack of any Zorro III cards to test it with. Very early on, I did a memory card, which tested normal slave access and even supported burst, though I didn't have a Buster that did for a year after this. The next test board was done for the multiprocessor project. This "Gemini" board tested the remaining Level II features: bus arbitration, bus mastering, Quick Interrupts, etc. Unfortunately, I based it on the Buster chip (there's a secret mode in Buster Level II that lets it run as a card controller rather than a motherboard controller). But that year (1991), CSG was changing over from channelled gate arrays to sea-of-gates technology, and their first chips were running at 1/4 speed or so. Six months later, I had fast chips, but also the new Engineering Administration, which considered Gemini either an illegal research project, or "something from the last administration". So no big pounding on the Zorro III bus was possible before the A4000 shipped. In all fairness, the Zorro III project was a large thing to bite off. When The PC Industry made EISA, there were hundreds of people involved: some to hammer out the specs, some to make chips, test, etc. At Commodore, it was basically just me for most of the life of Zorro III. The A4091 doesn't work with Level I Buster. Also, if you have an older A4091, OS2.04 or SuperKickStart could prevent it from booting, it would require 3.0 or 3.1 ROMs. And, just as a technical detail, Zorro III doesn't use a clock. The Z3 timing is based on your motherboard clock, but the bus protocol itself is asynchronous.

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